NEC PD75P402 Manuale Utente Pagina 181
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170
CHAPTER 9. INSTRUCTION SET
SKF mem. bit
Function: Skit if (mem. bit) = 0; mem = D7 to D0 : 00H to 3FH, bit = B1 to B0 : 0 to 3
If the bit specified by 2-bit immediate data bit of the address specified by 8-bit immediate data mem is 0,
skips the next instruction.
SKF fmem. bit
Function: Skip if (bit specified by operand) = 0
If the contents of the data memory bit specified by bit manipulation addressing (fmem. bit) is 0, skips the
next instruction.
SKTCLR fmem. bit
Function: Skip if (bit specified by operand) = 1 then clear
If the data memory bit specified by bit manipulation addressing (fmem. bit) is 1, skips the next instruction
and clears that bit to 0.
AND1 CY, fmem. bit
Function: CY ← CY ∧ (bit specified by operand)
ADDs the contents of the carry flag and the contents of the data memory bit specified by bit manipulation
addressing (fmem. bit) and sets the result into the carry flag.
OR1 CY, fmem. bit
Function: CY ← CY ∨ (bit specified by operand)
ORs the contents of the carry flag and the contents of the data memory bit specified by bit manipulation
addressing (fmem. bit) and sets the result into the carry flag.
XOR1 CY, fmem. bit
Function: CY ← CY ∨ (bit specified by operand)
Exclusive-ORs the contents of the carry flag and the contents of the data memory bit specified by bit
manipulation addressing (fmem. bit) and sets the result into the carry flag.
- PD75402A 1
- CONTENTS 6
- CONTENTS OF FIGURES 9
- Fig. No Title Page 9
- Fig. No. Title Page 10
- Table No. Title Page 11
- CHAPTER 1. GENERAL 12
- 1.1 OUTLINE OF FUNCTIONS 13
- 1.4 BLOCK DIAGRAM 16
- Remarks Parentheses for the 16
- PD75P402 16
- DD : Power supply 17
- SS : Ground 17
- PD75P402C/CT 18
- PD75402AGB-×××-3B4 19
- PD75P402GB-×××-3B4 19
- (2) PROM mode 20
- CHAPTER 2. PIN FUNCTIONS 21
- P00 P10 INT0 24
- P01 SCK P12 INT2 24
- P02 SO/SB0 24
- Address 76543210 Symbol 48
- Internal Bus 54
- Remarks n = 0 to 3 55
- Output Latch 56
- Φ Φ Φ Φ 63
- 2-Machine Cycles 64
- Manipulation Instruction 64
- Instruction 64
- Execution 64
- Input Timing 64
- Selector 65
- XX/4 (PCC1, PCC0 67
- External 68
- XX = 4.19 MHz) 71
- XX = 4.19 MHz 75
- PCL Pin 76
- XX (31.3 ms) 78
- XX (19.5 ms) 78
- ➁ Clear CSIE 88
- • • • 104
- 1 2 3 4 5 6 7 8 109
- SB0 ACK BUSY READY 111
- XX = 4.19 MHz operation 112
- Fig. 5-44 ACKT Operation 118
- “H”SCK 121
- 1 2 7 8 9 10 122
- Genera- 127
- ➀ READ command 132
- ➂ STATUS command 134
- ➄ CHGMST command 135
- SMP = tCY or 64/fXX 142
- X/64 is selected as 143
- 6.4 INTERRUPT SEQUENCE 145
- A B C D 146
- Interrupt 146
- (INTxxx) 146
- A C D 147
- Instruction other 147
- CHAPTER 8. RESET FUNCTION 157
- CHAPTER 9. INSTRUCTION SET 159
- ∧ (HL) *1 164
- ∨ (HL) *1 164
- ∧ (f mem. bit) *3 165
- ∨ (f mem. bit) *3 165
- Note 1. Instruction Group 166
- 2. I/O instructions 166
- 1 R0 reg 167
- 1 reg-pair 167
- 2N1N0 IE××× 167
- MOV A, #n4 170
- MOV rp, #n8 170
- MOV A, @HL 170
- MOV @HL, A 171
- MOV A, mem 171
- MOV XA, mem 171
- MOV mem, A 171
- MOV mem, XA 171
- XCH A, @HL 172
- XCH A, mem 172
- XCH XA, mem 172
- XCH A, reg1 172
- MOVT XA, @PCXA 173
- ADDS A, #n4 174
- ADDS A, @HL 174
- ADDC A, @HL 174
- AND A, @HL 174
- OR A, @HL 175
- XOR A, @HL 175
- INCS reg 177
- INCS mem 177
- DECS reg 177
- SKE reg, #n4 178
- SKE A, @HL 178
- ∧ (bit specified by operand) 181
- ∨ (bit specified by operand) 181
- BR $addr 182
- BRCB !caddr 182
- CALLF !faddr 183
- EI IEXXX 185
- DI IEXXX 185
- IN A, PORTn 186
- OUT PORTn, A 186
- 2. EV-9200G-44 192
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