NEC PD75P402 Manuale Utente Pagina 120

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109
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
Fig. 5-46 ACKD Operation
(a) When ACK signal is output in 9th SCK clock interval
(b) When ACK signal is output after 9th SCK clock interval
6
Transfer Start Directive
Start of
Transfer
SIO
SCK
SB0
ACKD
7 8 9
D2 D1 D0
ACK
(c) Clearing timing when transfer start directive is given during busy state
Transfer Start Directive
Start of Transfer
SIO
SCK
SB0
ACKD
ACK
D0
D2
D1
7 8
9
6
Fig. 5-47 BSYE Operation
SIO
SCK
SB0
ACKD
D2 D1 D0
6
7 8 9
ACK
BUSY
D7 D6
Start of Transfer
Transfer Start Directive
SCK
SB0
BSYE
6
7 8 9
D2 D1 D0
ACK
BUSY
When BSYE = 1 at
this Point
When BSYE is Reset in this 
Interval and BSYE = 0 when 
SCK Falls
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